Gecko [ v99win.today ]

Name	Size	Permission
bridge	[ DIR ]	drwxr-xr-x
i2c	[ DIR ]	drwxr-xr-x
ttm	[ DIR ]	drwxr-xr-x
amd_asic_type.h	2.15 KB	-rw-r--r--
drm_aperture.h	1.13 KB	-rw-r--r--
drm_atomic.h	40.7 KB	-rw-r--r--
drm_atomic_helper.h	9.27 KB	-rw-r--r--
drm_atomic_state_helper.h	4.21 KB	-rw-r--r--
drm_atomic_uapi.h	2.17 KB	-rw-r--r--
drm_audio_component.h	3.79 KB	-rw-r--r--
drm_auth.h	4.64 KB	-rw-r--r--
drm_blend.h	2.35 KB	-rw-r--r--
drm_bridge.h	33.19 KB	-rw-r--r--
drm_bridge_connector.h	548 B	-rw-r--r--
drm_cache.h	3.01 KB	-rw-r--r--
drm_client.h	4.94 KB	-rw-r--r--
drm_color_mgmt.h	3.79 KB	-rw-r--r--
drm_connector.h	55.15 KB	-rw-r--r--
drm_crtc.h	44.48 KB	-rw-r--r--
drm_crtc_helper.h	2.39 KB	-rw-r--r--
drm_damage_helper.h	3.33 KB	-rw-r--r--
drm_debugfs.h	3.4 KB	-rw-r--r--
drm_debugfs_crc.h	2.66 KB	-rw-r--r--
drm_device.h	8.52 KB	-rw-r--r--
drm_displayid.h	3.32 KB	-rw-r--r--
drm_dp_aux_bus.h	1.7 KB	-rw-r--r--
drm_dp_dual_mode_helper.h	4.62 KB	-rw-r--r--
drm_dp_helper.h	87.62 KB	-rw-r--r--
drm_dp_mst_helper.h	27.73 KB	-rw-r--r--
drm_drv.h	18.67 KB	-rw-r--r--
drm_dsc.h	16.29 KB	-rw-r--r--
drm_edid.h	17.16 KB	-rw-r--r--
drm_encoder.h	10.64 KB	-rw-r--r--
drm_encoder_slave.h	6.44 KB	-rw-r--r--
drm_fb_cma_helper.h	575 B	-rw-r--r--
drm_fb_helper.h	12.71 KB	-rw-r--r--
drm_file.h	12.12 KB	-rw-r--r--
drm_fixed.h	4.71 KB	-rw-r--r--
drm_flip_work.h	3.01 KB	-rw-r--r--
drm_format_helper.h	1.49 KB	-rw-r--r--
drm_fourcc.h	9.7 KB	-rw-r--r--
drm_framebuffer.h	10.4 KB	-rw-r--r--
drm_gem.h	11.8 KB	-rw-r--r--
drm_gem_atomic_helper.h	4.61 KB	-rw-r--r--
drm_gem_cma_helper.h	6.83 KB	-rw-r--r--
drm_gem_framebuffer_helper.h	2.06 KB	-rw-r--r--
drm_gem_shmem_helper.h	4.23 KB	-rw-r--r--
drm_gem_ttm_helper.h	861 B	-rw-r--r--
drm_gem_vram_helper.h	6.17 KB	-rw-r--r--
drm_hashtab.h	3.01 KB	-rw-r--r--
drm_hdcp.h	8.79 KB	-rw-r--r--
drm_ioctl.h	6.23 KB	-rw-r--r--
drm_lease.h	1010 B	-rw-r--r--
drm_legacy.h	9.26 KB	-rw-r--r--
drm_managed.h	3.35 KB	-rw-r--r--
drm_mipi_dbi.h	4.72 KB	-rw-r--r--
drm_mipi_dsi.h	10.79 KB	-rw-r--r--
drm_mm.h	17.5 KB	-rw-r--r--
drm_mode_config.h	32.24 KB	-rw-r--r--
drm_mode_object.h	5.17 KB	-rw-r--r--
drm_modes.h	18.18 KB	-rw-r--r--
drm_modeset_helper.h	1.77 KB	-rw-r--r--
drm_modeset_helper_vtables.h	55.98 KB	-rw-r--r--
drm_modeset_lock.h	6.8 KB	-rw-r--r--
drm_of.h	4.11 KB	-rw-r--r--
drm_panel.h	6.26 KB	-rw-r--r--
drm_pciids.h	66.47 KB	-rw-r--r--
drm_plane.h	28.48 KB	-rw-r--r--
drm_plane_helper.h	1.75 KB	-rw-r--r--
drm_prime.h	4.07 KB	-rw-r--r--
drm_print.h	16.09 KB	-rw-r--r--
drm_probe_helper.h	848 B	-rw-r--r--
drm_property.h	11.76 KB	-rw-r--r--
drm_rect.h	6.86 KB	-rw-r--r--
drm_scdc_helper.h	4.34 KB	-rw-r--r--
drm_self_refresh_helper.h	594 B	-rw-r--r--
drm_simple_kms_helper.h	8.91 KB	-rw-r--r--
drm_syncobj.h	3.85 KB	-rw-r--r--
drm_sysfs.h	442 B	-rw-r--r--
drm_util.h	2.58 KB	-rw-r--r--
drm_utils.h	504 B	-rw-r--r--
drm_vblank.h	9.04 KB	-rw-r--r--
drm_vblank_work.h	1.91 KB	-rw-r--r--
drm_vma_manager.h	8.15 KB	-rw-r--r--
drm_writeback.h	4.05 KB	-rw-r--r--
gma_drm.h	413 B	-rw-r--r--
gpu_scheduler.h	15.44 KB	-rw-r--r--
gud.h	11.58 KB	-rw-r--r--
i915_component.h	1.76 KB	-rw-r--r--
i915_drm.h	3.6 KB	-rw-r--r--
i915_mei_hdcp_interface.h	5.76 KB	-rw-r--r--
i915_pciids.h	21.38 KB	-rw-r--r--
intel-gtt.h	996 B	-rw-r--r--
intel_lpe_audio.h	1.72 KB	-rw-r--r--
spsc_queue.h	3.06 KB	-rw-r--r--
task_barrier.h	2.95 KB	-rw-r--r--

Code Editor : drm_scdc_helper.h

/*
 * Copyright (c) 2015 NVIDIA Corporation. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sub license,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

#ifndef DRM_SCDC_HELPER_H
#define DRM_SCDC_HELPER_H

#include <linux/i2c.h>
#include <linux/types.h>

#define SCDC_SINK_VERSION 0x01

#define SCDC_SOURCE_VERSION 0x02

#define SCDC_UPDATE_0 0x10
#define  SCDC_READ_REQUEST_TEST (1 << 2)
#define  SCDC_CED_UPDATE (1 << 1)
#define  SCDC_STATUS_UPDATE (1 << 0)

#define SCDC_UPDATE_1 0x11

#define SCDC_TMDS_CONFIG 0x20
#define  SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 (1 << 1)
#define  SCDC_TMDS_BIT_CLOCK_RATIO_BY_10 (0 << 1)
#define  SCDC_SCRAMBLING_ENABLE (1 << 0)

#define SCDC_SCRAMBLER_STATUS 0x21
#define  SCDC_SCRAMBLING_STATUS (1 << 0)

#define SCDC_CONFIG_0 0x30
#define  SCDC_READ_REQUEST_ENABLE (1 << 0)

#define SCDC_STATUS_FLAGS_0 0x40
#define  SCDC_CH2_LOCK (1 << 3)
#define  SCDC_CH1_LOCK (1 << 2)
#define  SCDC_CH0_LOCK (1 << 1)
#define  SCDC_CH_LOCK_MASK (SCDC_CH2_LOCK | SCDC_CH1_LOCK | SCDC_CH0_LOCK)
#define  SCDC_CLOCK_DETECT (1 << 0)

#define SCDC_STATUS_FLAGS_1 0x41

#define SCDC_ERR_DET_0_L 0x50
#define SCDC_ERR_DET_0_H 0x51
#define SCDC_ERR_DET_1_L 0x52
#define SCDC_ERR_DET_1_H 0x53
#define SCDC_ERR_DET_2_L 0x54
#define SCDC_ERR_DET_2_H 0x55
#define  SCDC_CHANNEL_VALID (1 << 7)

#define SCDC_ERR_DET_CHECKSUM 0x56

#define SCDC_TEST_CONFIG_0 0xc0
#define  SCDC_TEST_READ_REQUEST (1 << 7)
#define  SCDC_TEST_READ_REQUEST_DELAY(x) ((x) & 0x7f)

#define SCDC_MANUFACTURER_IEEE_OUI 0xd0
#define SCDC_MANUFACTURER_IEEE_OUI_SIZE 3

#define SCDC_DEVICE_ID 0xd3
#define SCDC_DEVICE_ID_SIZE 8

#define SCDC_DEVICE_HARDWARE_REVISION 0xdb
#define  SCDC_GET_DEVICE_HARDWARE_REVISION_MAJOR(x) (((x) >> 4) & 0xf)
#define  SCDC_GET_DEVICE_HARDWARE_REVISION_MINOR(x) (((x) >> 0) & 0xf)

#define SCDC_DEVICE_SOFTWARE_MAJOR_REVISION 0xdc
#define SCDC_DEVICE_SOFTWARE_MINOR_REVISION 0xdd

#define SCDC_MANUFACTURER_SPECIFIC 0xde
#define SCDC_MANUFACTURER_SPECIFIC_SIZE 34

ssize_t drm_scdc_read(struct i2c_adapter *adapter, u8 offset, void *buffer,
		      size_t size);
ssize_t drm_scdc_write(struct i2c_adapter *adapter, u8 offset,
		       const void *buffer, size_t size);

/**
 * drm_scdc_readb - read a single byte from SCDC
 * @adapter: I2C adapter
 * @offset: offset of register to read
 * @value: return location for the register value
 *
 * Reads a single byte from SCDC. This is a convenience wrapper around the
 * drm_scdc_read() function.
 *
 * Returns:
 * 0 on success or a negative error code on failure.
 */
static inline int drm_scdc_readb(struct i2c_adapter *adapter, u8 offset,
				 u8 *value)
{
	return drm_scdc_read(adapter, offset, value, sizeof(*value));
}

/**
 * drm_scdc_writeb - write a single byte to SCDC
 * @adapter: I2C adapter
 * @offset: offset of register to read
 * @value: return location for the register value
 *
 * Writes a single byte to SCDC. This is a convenience wrapper around the
 * drm_scdc_write() function.
 *
 * Returns:
 * 0 on success or a negative error code on failure.
 */
static inline int drm_scdc_writeb(struct i2c_adapter *adapter, u8 offset,
				  u8 value)
{
	return drm_scdc_write(adapter, offset, &value, sizeof(value));
}

bool drm_scdc_get_scrambling_status(struct i2c_adapter *adapter);

bool drm_scdc_set_scrambling(struct i2c_adapter *adapter, bool enable);
bool drm_scdc_set_high_tmds_clock_ratio(struct i2c_adapter *adapter, bool set);
#endif

${this.title}

Code Editor : drm_scdc_helper.h